1. Field of the Invention
The present invention relates to circuit structures and fabrication methods thereof, and more particularly, to a circuit structure and a fabrication method thereof for meeting the miniaturization requirement.
2. Description of Related Art
Along with the rapid development of electronic industries, electronic products are required to be much lighter, thinner, shorter and smaller and multi-functional. Accordingly, there have been developed various types of semiconductor packages and various types of packaging substrates for disposing semiconductor chips. For example, circuit structures can be provided for packaging substrates by using MIS (molded interconnect system) packaging technologies.
FIGS. 1A to 1C are schematic cross-sectional views showing a method for fabricating a circuit structure 1 by using MIS packaging technologies.
Referring to FIGS. 1A and 1A′, a plurality of circuits 16, 17, a plurality of first conductive pads 11 and a plurality of conductive posts 13 are sequentially formed on a surface 10a of a carrier 10. Each of the first conductive pads 11 has a circular shape. Each of the conductive posts 13 has a cylindrical shape. Then, an encapsulant 14 is formed on the surface 10a of the carrier 10 by molding for encapsulating the first conductive pads 11 and the conductive posts 13. Further, surfaces of the conductive posts 13 are exposed from the encapsulant 14.
Referring to FIGS. 1B and 1B′, a plurality of circuits 16, 17 are formed on the encapsulant 14 and a plurality of second conductive pads 12 are formed on the exposed surfaces of the conductive posts 13 and the encapsulant 14 around peripheries of the conductive posts 13. Each of the second conductive pads 12 has a circular shape.
Referring to FIG. 1C, the carrier 10 is removed to expose the first conductive pads 11 from the encapsulant 14. As such, a circuit structure 1 is formed. The first and second conductive pads 11, 12 can be used for bonding with solder bumps and solder balls, respectively. Further, each of the conductive posts 13 has a diameter r and each of the first and second conductive pads 11, 12 has a diameter d greater than the diameter r.
However, in the conventional circuit structure 1, since the first and second conductive pads 11, 12 are circular-shaped metal pads and occupy a certain area of the overall wiring space, the wiring of the circuits 16, 17 is limited. For example, a certain distance must be kept between the circuits 17 and the first conductive pads 11, and consequently, only a limited number of the circuits 17 can be formed to pass between two adjacent first conductive pads 11, thereby adversely affecting the wiring flexibility, reducing the wiring density and making it difficult to meet the demands for fine-pitch and multi-joints.
Further, since the diameter d of each of the first and second conductive pads 11, 12 is greater than the diameter r of each of the conductive posts 13, the conductive posts 13 have a smaller-sized path of thermal and electrical conduction compared with the first and second conductive pads 11, 12, thus leading to poor thermal and electrical conductivities of the circuit structure 1.
Therefore, how to overcome the above-described drawbacks has become critical.